The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 08, 2005
Filed:
Jan. 14, 2004
Ted Johansson, Djursholm, SE;
Hans Norström, Solna, SE;
Ted Johansson, Djursholm, SE;
Hans Norström, Solna, SE;
Infineon Technologies AG, Munich, DE;
Abstract
A method for selective etching in the manufacture of a semiconductor device comprises: forming a layer () of silicon-germanium on a substrate () of monocrystalline silicon or on a substrate at least comprising a surface layer of monocrystalline silicon, depositing at least a dielectric layer () on the silicon-germanium layer () and patterning the resultant structure (), whereafter the dielectric layer () and the silicon-germanium layer () are etched away within a predetermined region (). Preferably, the silicon-germanium layer () is amorphous, whereby the dielectric layer () is deposited on the amorphous silicon-germanium layer () in such a manner to prevent crystallization of the amorphous layer. After etching the structure may be heat-treated such that the amorphous layer crystallizes. The method is preferably applicable for etching an emitter window in the manufacture of a bipolar transistor having a self-registered base-emitter structure.