The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2005
Filed:
May. 26, 2000
Duane F. Krolski, Gilbert, AZ (US);
James J. Jirgal, Chandler, AZ (US);
Duane F. Krolski, Gilbert, AZ (US);
James J. Jirgal, Chandler, AZ (US);
Koninklijke Philips Electronics N.V., Eindhoven, NL;
Abstract
A computer system is provided with a memory management unit (MMU) utilizing a translation look-aside buffer (TLB) arrangement. The computer system includes a bus, a unified cache memory, a main memory, a processor, and a memory controller. The TLB is configured for storing code and/or data. The main memory is coupled to the bus. The main memory contains descriptor tables for mapping virtual-to-physical address translations within a virtual memory system. The processor is coupled to the bus and the unified cache memory. The processor is configured to communicate and sequentially move through the main memory to retrieve a line of information from the main memory for storage in the unified cache memory. The cache is configured for storing the most recently retrieved code and data from main memory. The memory controller is coupled between the bus and the main memory. The memory controller is operative to enable the processor to retrieve the information in the form of descriptor page table entries for the translation lookaside buffer (TLB), or code and/or data for the unified cache memory. A method is also provided.