The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2005

Filed:

Oct. 28, 2003
Applicants:

Toru Itabashi, Anjo, JP;

Takanori Ishikawa, Aichi-ken, JP;

Junichi Nagata, Okazaki, JP;

Inventors:

Toru Itabashi, Anjo, JP;

Takanori Ishikawa, Aichi-ken, JP;

Junichi Nagata, Okazaki, JP;

Assignee:

Denso Corporation, Kariya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 140 ;
U.S. Cl.
CPC ...
Abstract

The power supply PS includes a voltage detecting circuit VD for detecting a voltage level Vs inputted from an external voltage source, a boot strap circuit BS, andET connected in parallel with BS, a smoothing circuit SM connected with the BS output terminal and a regulating IC connected with BS and FET. The regulating IC includes VD, a transistor Tr and condenser C. Both when a PS switch is turned on and when VD detects that Vs (which once descended) reaches an ascending reference, a high level driving signal generated by VD is changed into a low level signal, thereby turning off Tr connected with C. Thus, until Tr completes charging up C, a duty ratio of a pulse width modulation (PWM) signal dependent on the SM output is made gradually greater, thereby surely preventing a rush current by turning on and off the FET by the PWM signal.


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