The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6849552 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 01, 2005

Filed:

Dec. 18, 2002
Applicant:

Cheol Soo Park, Kyoungki-do, KR;

Inventor:

Cheol Soo Park, Kyoungki-do, KR;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21311 ;
U.S. Cl.
CPC ...
Abstract

A vertical type transistor and fabricating method therefor. An isolation oxide layer is formed on a field region in a silicon substrate to expose an active region, and an epitaxial silicon layer is formed on the active region of a source region is formed in the vicinity of the surface of the silicon substrate and a drain region is formed on the epitaxial silicon layer. A masking insulator spacer is formed at the side wall of stair part, and the epitaxial silicon layer exposed through the masking insulator spacer is removed. A gate insulating layer is formed along with the exposed surfaces of the epitaxial silicon layer, the source region, and the drain region. A gate electrode is formed to contact with the gate insulating layer. A planarization insulating layer is formed over whole structure, and contact holes and contact plugs are formed thereon.


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