The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2005

Filed:

Mar. 15, 2001
Applicants:

Masaaki Hayama, Nara, JP;

Kazuhiro Miura, Osaka, JP;

Akira Hashimoto, Kyoto, JP;

Takeo Yasuho, Osaka, JP;

Inventors:

Masaaki Hayama, Nara, JP;

Kazuhiro Miura, Osaka, JP;

Akira Hashimoto, Kyoto, JP;

Takeo Yasuho, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B 3126 ; H05K 346 ;
U.S. Cl.
CPC ...
Abstract

The present invention provides a method of manufacturing a low-temperature sintering multilayer ceramic wiring board comprising the steps of: forming a wiring layer by printing conductive paste () on an unfired green sheet (); forming a laminate by laminating, on at least one side of a ceramic substrate, the unfired green sheet having the wiring layer; and firing the laminate. The present invention also provides paste for use with this method. In the firing step, after an adhesive layer () or binder resin in said green sheet used for lamination burns, glass ceramic in the green sheet starts to sinter, and upon or after the start of sintering of the glass ceramic, conductive particles in the conductive paste starts to sinter. This manufacturing method can provide an precise wiring board without pattern deformation and also provide a low-temperature ceramic multilayer wiring board that has no cracks in the glass ceramic on the periphery of electrodes and has electrodes of a dense film structure.


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