The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 2005
Filed:
Mar. 12, 2001
Applicant:
Michael T. Moore, Santa Clara, CA (US);
Inventor:
Michael T. Moore, Santa Clara, CA (US);
Assignee:
Cypress Semiconductor Corp., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19177 ;
U.S. Cl.
CPC ...
Abstract
An apparatus comprising one or more logic circuits. The logic circuits may be configured to provide computation. The one or more logic circuits generally comprise dedicated logic within a programmable logic device (PLD).
Quick Actions:
Moore, Michael. (2005). Configurable dedicated logic in plds (U.S. Patent No. 6844756). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6844756
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