The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2005

Filed:

Nov. 19, 2002
Applicants:

Kenichi Origasa, Takatsuki, JP;

Kiyoto Ohta, Takatsuki, JP;

Masanobu Hirose, Kameoka, JP;

Inventors:

Kenichi Origasa, Takatsuki, JP;

Kiyoto Ohta, Takatsuki, JP;

Masanobu Hirose, Kameoka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 700 ;
U.S. Cl.
CPC ...
Abstract

The present invention is a semiconductor memory device provided with bit line pairs to which a plurality of memory cells are attached, a plurality of precharge circuits for precharging the bit line pairs to a first voltage that is different from a mean value between a high level and a low level, a bit line precharge power line for supplying the first voltage for precharging to the precharge circuits, a capacitor, a charging circuit for charging the capacitor, and transfer gate circuits for controlling connection and disconnection of the capacitor and the bit line precharge power line. The transfer gate circuits are controlled so that the capacitor and the precharge power line are connected during precharging of the bit line pairs. Thus, precharging of the bit lines can be performed at high speeds with high precision.


Find Patent Forward Citations

Loading…