The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2005
Filed:
May. 23, 2003
Nai-shuo Cheng, Simi Valley, CA (US);
Kevin Choi, Thousand Oaks, CA (US);
Peter P. Tran, Oxnard, CA (US);
Nai-Shuo Cheng, Simi Valley, CA (US);
Kevin Choi, Thousand Oaks, CA (US);
Peter P. Tran, Oxnard, CA (US);
Skyworks Solutions, Inc., Irvine, CA (US);
Abstract
According to one exemplary embodiment, a gain reduction circuit comprises a first terminal, where the first terminal is coupled to a control signal. The gain reduction circuit further comprises a second terminal, where the second terminal is coupled to an input of an amplifier, and where the amplifier is configured to operate in low-power mode and high-power mode. The gain reduction circuit further comprises a transistor coupled to the first terminal and the second terminal. The transistor can be, for example, a bipolar transistor, such as an NPN GaAs heterojunction bipolar transistor, having a base, a collector, and an emitter, where the base being is coupled the control signal, the collector is coupled to the input of the amplifier, and the emitter is coupled to ground. According to this exemplary embodiment, the transistor causes a gain of the amplifier to be reduced when the amplifier is operating in low-power mode.