The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2005

Filed:

Dec. 26, 2000
Applicants:

Kinji Saijo, Yamaguchi-ken, JP;

Kazuo Yoshida, Yamaguchi-ken, JP;

Hiroaki Okamoto, Yamaguchi-ken, JP;

Shinji Ohsawa, Yamaguchi-ken, JP;

Inventors:

Kinji Saijo, Yamaguchi-ken, JP;

Kazuo Yoshida, Yamaguchi-ken, JP;

Hiroaki Okamoto, Yamaguchi-ken, JP;

Shinji Ohsawa, Yamaguchi-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2348 ; H01L 2144 ;
U.S. Cl.
CPC ...
Abstract

A means for highly precisely and economically fabricating wiring on a semiconductor and highly precisely and economically forming a bump on an electrodes. () A semiconductor device comprising a semiconductor, a metal foil for fabricating wiring and conductor wiring on the semiconductor, and a method of fabricating a conductor wiring circuit on a semiconductor, comprising the steps of laying a metal foil for fabricating wiring on the electrode-forming side of the semiconductor, forming a resist wiring pattern by photo-etching the metal foil, etching the metal foil, and removing the resist to form the wiring. () A semiconductor device which comprises a multilayer metal foil for fabricating wiring in place of the metal foil for forming wiring of the semiconductor device described in (); and a method of fabricating conductor wiring having a bump on a semiconductor, comprising the steps of the method described in () and further comprising the steps of forming a resist pattern for forming the bump by photo-etching the multilayer metal foil for forming the wiring, forming a bump by selective etching, and removing an etch-stop layer.


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