The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2005

Filed:

Dec. 27, 2002
Applicants:

Hyung Gil Baik, Kyoungki-do, KR;

Ki Ill Moon, Kyoungki-do, KR;

Inventors:

Hyung Gil Baik, Kyoungki-do, KR;

Ki Ill Moon, Kyoungki-do, KR;

Assignee:

Hynix Semiconductor Inc., Kyoungki-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2348 ;
U.S. Cl.
CPC ...
Abstract

Disclosed is a ball grid array package with stacked center pad chips, which realizes a BGA package with stacked chips using center pad type semiconductor chips, and a method for manufacturing the same. The semiconductor chips are glued on each of upper and lower circuit boards, which have active surfaces facing each other; the chip pads are connected to each of the upper and lower circuit boards with gold wires; the upper and lower circuit boards are joined together with bumps interposed between them for electrical connection; the upper circuit board is included in a package mold; and the opposite ends of the lower circuit board are exposed to the lower portion of the package mold. The lower circuit board can be made of flexible insulation film. The exposed opposite ends of the lower circuit board can have solder balls formed thereon. Also, the opposite ends of the lower circuit board may be joined to a printed circuit board. Solder balls may be formed on the lower surface of the printed circuit board. The upper circuit board may be composed of a lead frame. The package according to the present invention is a stacked package capable of increasing memory capacity of a single package by at least 200% and combining both advantages of FBGA packages and of center pad type semiconductor chips.


Find Patent Forward Citations

Loading…