The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2005
Filed:
Oct. 24, 2001
Method and system for predictive multi-component circuit layout generation with reduced design cycle
Koen Lampaer, Irvine, CA (US);
Andy Brotman, Irvine, CA (US);
Paolo Miliozzi, Irvine, CA (US);
Paramjit Singh, Lake Forest, CA (US);
Mishel Matloubian, Irvine, CA (US);
Bijan Bhattacharyya, Irvine, CA (US);
Koen Lampaer, Irvine, CA (US);
Andy Brotman, Irvine, CA (US);
Paolo Miliozzi, Irvine, CA (US);
Paramjit Singh, Lake Forest, CA (US);
Mishel Matloubian, Irvine, CA (US);
Bijan Bhattacharyya, Irvine, CA (US);
Conexant Systems, Inc., Newport Beach, CA (US);
Abstract
One embodiment discloses receiving a number of parameter values for a multi-component circuit. From the received parameter values, a number of parasitic values for various components in the multi-component circuit are determined. For example, parasitic resistor values and parasitic capacitor values for transistors in the multi-component circuit are determined. The parasitic resistor values and parasitic capacitor values are used in simulating the multi-component circuit. According to a disclosed embodiment, a layout of the multi-component circuit is then generated that results in parasitic values that are the same as the parasitic values already used in simulating the multi-component circuit. As such, the parasitic values of the multi-component circuit have already been taken into account in the initial circuit simulation and there is no need to extract the internal parasitics of the multi-component circuit for further circuit simulations.