The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2005
Filed:
May. 19, 2003
Yasushi Sasaki, Saitama-ken, JP;
Katsuhiko Inada, Saitama-ken, JP;
Tetsuo Morita, Saitama-ken, JP;
Koichi Shiba, Saitama-ken, JP;
Yasushi Sasaki, Saitama-ken, JP;
Katsuhiko Inada, Saitama-ken, JP;
Tetsuo Morita, Saitama-ken, JP;
Koichi Shiba, Saitama-ken, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A display device includes a substrate (), pixel electrodes (PIX) formed on the substrate (), scanning lines (G) to transmit scanning signals, signal lines (S) divided into four groups (LL, LR, RL and RR) to transmit data signals, signal line driving circuits () to drive the groups (LL, LR, RL and RR) of the signal lines (S), respectively, analog switch control signal lines (and) connected between the signal line driving circuits () and the groups (LL, LR, RL and RR) of the signal lines (S), and transistors (ASW) connected between the analog switch control signal lines (and) and the groups (LL, LR, RL and RR) of the signal lines (S) to provide the data signals to the pixel electrodes (PIX) in response to the scanning signals. An electrical path length between the signal line driving circuits () and a point (A) of the analog switch control signal lines (and) provided at a boundary region between the groups (LL and LR), for example, of the signal lines (S) is configured to be substantially the same as the one between the signal line driving circuits () and a point (B) of the analog switch control signal lines (and) provided at a boundary region between the groups (LL and LR) of the signal lines (S).