The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2005

Filed:

Jul. 12, 2001
Applicants:

Peter R. Nuytkens, Melrose, MA (US);

Ilya E. Popeko, Forest Hills, NY (US);

Joseph M. Kulinets, Stamford, CT (US);

Inventors:

Peter R. Nuytkens, Melrose, MA (US);

Ilya E. Popeko, Forest Hills, NY (US);

Joseph M. Kulinets, Stamford, CT (US);

Assignee:

Custom One Design, Inc., Melrose, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23495 ;
U.S. Cl.
CPC ...
Abstract

An electrical circuit having one or more dielectric layers formed of latex; and one or more layers of electrically conductive material, such as copper, patterned to form multiple electrical interconnects, with each such layer placed on top of one of said dielectric layers. The dielectric and conductive layers can be used to connect multiple chips in a multichip module. The latex layers can be formed to have a top surface that contains peaks and valleys, and the conductive layers can be formed of a first metal that substantially fills such valleys, so as to increase the adherence of the metal to the latex surface. The layers of conductive metal can contain particles of a second metal between said peaks and valleys of the latex layer that were used as a catalytic seed particles to promote the deposition of the metal layer onto the top surface of the latex.


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