The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2004

Filed:

Aug. 06, 2003
Applicant:
Inventors:

Masayuki Hira, Ibaraki, JP;

Yasushi Ichimura, Kasama, JP;

Takahiro Matsuzawa, Ibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

The semiconductor memory device has a memory capacity that can be increased without increasing the load to bit lines and has increased access speed. Because the output lines of bit line selector circuits through are precharged by charge circuits through , and selectable bit lines (SBL, SBLZ) reach a high level before access is gained for reading from memory cells, data read previously is held unchanged for output signal SAOUT of data latch circuit . Because output lines of bit line selector circuits through are all at the high level even when another gate circuit becomes conductive as a new read address is set, the selected bit lines remains at the high level, and data previously read is held unchanged for output signal SAOUT of data latch circuit . Output signal SAOUT of data latch circuit is changed to the next data read as soon as differential amplification operation of the bit lines is completed by amplifier circuits through


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