The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2004

Filed:

Feb. 14, 2001
Applicant:
Inventors:

Takashi Hashimoto, Tokyo, JP;

Takahiro Urakabe, Tokyo, JP;

Akihiko Iwata, Tokyo, JP;

Yoshikazu Tsunoda, Tokyo, JP;

Takayoshi Nagai, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/28 ;
U.S. Cl.
CPC ...
G09G 3/28 ;
Abstract

In a reset period, through applying a rectangular pulse (Pya) of positive polarity to an electrode (Y) and applying a CR pulse (Pxa) of negative polarity to an electrode X, a full lighting pulse is applied between the electrodes (X and Y). The application of the voltage is stopped before a CR pulse (Pxc) reaches a final potential, to generate the pulse (Pxa). A full erase pulse (Pxb) made of a CR pulse having a polarity reverse to that of the pulse (Pxa) is applied to the electrode (X). An erase operation reverses the polarity of wall charges accumulated by a full lighting to effectively perform a potential control operation. The potential control pulse (Pxc) is applied to the electrode (X) to generate a discharge, and the state of the wall charges in a discharge cell is controlled by the discharge to generate an optimal amount of wall charges for a subsequent addressing discharge. The final voltage of the pulse (Pxc) is set equal to a voltage (−Vxg) of an address pulse (Pa). Thus, it is possible to generate a plurality of pulses and stabilize an operation of a PDP with a simple constitution.


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