The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2004

Filed:

May. 08, 2002
Applicant:
Inventors:

Donald T. Pullen, Anaheim, CA (US);

Norman L. Culp, Plano, TX (US);

Xiaoyu Xi, Plano, TX (US);

Keith E. Kunz, Dallas, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/90185 ;
U.S. Cl.
CPC ...
H03K 1/90185 ;
Abstract

A output driver architecture ( ) is proposed that uses thin gate-oxide core and thin gate-oxide Drain-extended transistors that can directly interface with voltage supplies up to six times the normal rating of the transistor. A bias generator ( ), level shifter ( ) and output stage ( ) are adapted to buffer an input signal with a voltage swing of less than the normal operating voltage of the transistors to an output signal with a voltage swing of up to approximately six times the normal operating voltage of the transistors. The bias generator is interfaced directly with a high voltage power supply and generates a bias voltage with a magnitude of less than the dielectric breakdown of the transistors internal to the level shifter and output stage. Further, the bias generator is adapted to sense the magnitude of the high voltage supply, and to automatically and continuously self-adjust the bias voltage in response to changes sensed in the magnitude of the high voltage supply such that the bias generator can be used for a continuous range of high voltage supplies up to 6 times the normal operating voltage of the transistors.


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