The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 2004
Filed:
Sep. 14, 2000
Sunil Tomar, Fremont, CA (US);
Shashij Singh, San Jose, CA (US);
Ciena Corporation, Linthicum, MD (US);
Abstract
Methods and apparatuses for laying out an integrated circuit include a first plurality of I/O ports that are positioned along the first side, a plurality of queues that are coupled to the first plurality of I/O ports, a first bus that is positioned extending from the plurality of queues toward the second side to couple a control circuit to the plurality of queues, second plurality of I/O ports that are positioned along the third side and the fourth side, and a second bus that is positioned between the control circuit and the second plurality of I/O ports to couple the control circuit to the second plurality of I/O ports, wherein the first bus and the second bus are positioned such that the respective bus lines do not cross over each other. A time and space switching apparatus and component cell permit a bit within a data line to be selected.