The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 2004
Filed:
Dec. 09, 2002
Applicant:
Inventor:
David Owen Erstad, Minnetonka, MN (US);
Assignee:
Honeywell International Inc., Morristown, NJ (US);
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/01 ;
U.S. Cl.
CPC ...
H03K 3/01 ;
Abstract
A buffer circuit is used to provide hysteresis, which can reduce the negative effects of noise in digital circuits. Reducing the number of transistors in the buffer circuit reduces the amount of space the circuit occupies and reduces power consumption. By connecting a voltage-coupling element between the body of a transistor in a first inverter and an output of a second inverter, the voltage-coupling element can control the hysteresis of the buffer circuit.