The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6833743 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 21, 2004

Filed:

Oct. 29, 2002
Applicant:
Inventors:

Gong Gu, Bridgewater, NJ (US);

Kadaba R. Lakshmikumar, Basking Ridge, NJ (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 2/506 ;
U.S. Cl.
CPC ...
H04L 2/506 ;
Abstract

Circuits for adjusting the duty cycle of a clock(s) signal include a negative feedback loop for applying an offset signal to the uncorrected clock signal(s). The offset signal, which corresponds to a duty cycle error of the corrected clock signal(s), adjusts the slicing level of the uncorrected clock signal(s) to cause the duty cycle error to converge toward a predetermined value, for example, zero. The techniques may be used to adjust the duty cycle error of differential clock signals as well as single-ended clock signals.


Find Patent Forward Citations

Gu, Gong. (2004). Adjustment of a clock duty cycle (U.S. Patent No. 6833743). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6833743

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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