The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2004

Filed:

Jul. 31, 2003
Applicant:
Inventors:

Kenji Abe, Kawasaki, JP;

Hideki Isobe, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

A simulation coverage calculating apparatus is provided for calculating a simulation coverage for a complete verification. The apparatus includes a first input unit, a second input unit, an effective test pattern calculating unit, a coverage ratio calculating unit, and an output unit. The first input unit reads a property that represents effective test patterns to a logic circuit to be verified. The effective test pattern calculating unit calculates the effective test patterns based on the property. The second input unit reads the test patterns entered and executed by a verifier. The coverage ratio calculating unit calculates a coverage ratio from a ratio of the number of the test patterns matched to the effective test patterns to the number of all of the effective test patterns. The output unit outputs the calculated coverage ratio.


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