The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2004
Filed:
Oct. 02, 2001
James R. Magro, Austin, TX (US);
Michael S. Quimby, Austin, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A processor-based system such as a workstation or server, using a system clock provided through a phase-locked loop (PLL) to a clock gate and then to a clock tree, which distributes the core system clock to components in the processor-based system, including a host bridge circuit. The host bridge distributes control signals to a receiving device such as a memory module, which may use a continued clocking signal when the system enters a low-power mode. A feedback clock for the PLL is provided to the receiving devices during low-power mode to ensure continued clocking, when the clock gate output is low and the clock tree is thereby disabled. A skew compensation circuit coordinates clocking in the continued clock and the core system clock.