The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2004
Filed:
Apr. 22, 2002
Thomas M. Wicki, Palo Alto, CA (US);
Koen R. C. Bennebroek, Sunnyvale, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
An n-way interleaved set-associative external cache utilizes standard burst memory devices such as DDR (double data rate) memory devices. The interleaved set-associative cache organization scheme is designed to fully utilize burst efficiencies during snoop and invalidation operations. Cache lines are interleaved in such a way that a first burst transfer from the cache to the cache controller brings in a plurality of tags. The contents of the memory level device locations associated with each tag are stored in an alternating pattern in contiguous memory locations.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile