The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2004

Filed:

Sep. 28, 2001
Applicant:
Inventor:

Thomas G. Wilson, Jr., Eden Prairie, MN (US);

Assignee:

Transim Technology Corporation, Portland, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

An electronic circuit simulator technique dramatically reduces barriers to simulation of complex analog circuits. The simulator technique reduces simulation preparation time by permitting a skilled user to formulate a simulation strategy that can combine a modeling strategy, a deck extraction strategy, and a comprehensive suite of pre-engineered simulation tests that fully characterize a system under test. The simulation technique reduces the CPU time required for each test by allowing a skilled user to encode a device modeling strategy and a deck extraction strategy that effectively minimize the CPU time required to achieve a given simulation objective. For a given simulation objective, a skilled user chooses for each element implemented in a simulation a device model of minimum complexity that achieves a desired level of simulation accuracy and extracts a portion of the complete production schematic that achieves the desired level of simulation accuracy.


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