Method and apparatus to compliantly interconnect commercial-off-the-shelf chip scale packages and printed wiring boards

Abstract

The present invention comprises cost-effectively manufactured, electrically conductive and mechanically compliant micro-leads and a method of utilizing these compliant micro-leads to interconnect area grid array chip scale packages (“CSPs”) to printed wiring boards (“PWBs”). The preferred method includes orienting a plurality of conductive compliant micro-leads, secured to one another in parallel with tie bars and tooling, to align with a corresponding pattern of conductive pads located along the surface of an area grid array CSP. The compliant micro-leads are electrically connected and mechanically secured to the corresponding connecting surfaces of the area grid array CSP. Next, the securing tie bars and the tooling are removed. The opposite ends of the conductive compliant micro-leads are then oriented to align with a corresponding pattern of conductive surface pads on a PWB. The opposite end of each compliant micro-lead is then electrically connected and mechanically secured to its corresponding connecting pad located on the surface of the PWB, thereby establishing a compliant electrical connection between the area grid array CSP and the PWB. An alternative embodiment of the present invention utilizes an area grid array interposer with compliant micro-leads to provide additional compliancy.