The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2004
Filed:
Jun. 04, 2002
Qiong J. Yu, San Jose, CA (US);
Radoslav M. Ratchkov, Santa Clara, CA (US);
Bo Shen, Fremont, CA (US);
Prasad Subbarao, San Jose, CA (US);
Thomas M. Antisseril, Newark, CA (US);
Charutosh Dixit, Sunnyvale, CA (US);
Julie L. Beatty, Campbell, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A method for checking power errors in an ASIC design is disclosed. The method includes providing a power checker software program with one or more power checker modules that each check a particular type of power element in the ASIC design. A power checker database is created that stores the following: individual power elements in the ASIC design, a connectivity graph of the power elements, and location bins corresponding to physical areas in ASIC design that identify the power elements that are located within each area. The method further includes providing a user with a choice of which power elements in the design to check, and executing the power checker modules corresponding to the selected power elements in order to check for errors in the selected power elements. Finally, any detected errors are output for the user.