Clock synchronized nonvolatile memory device

Abstract

A nonvolatile memory apparatus including plural terminals including a first terminal, a second terminal and other terminal, and a nonvolatile memory array including plural nonvolatile memory cells. The first terminal receives a clock signal and the second terminal receives information for specifying an arbitrary one of the read and program operations. Each memory cell stores multi-bit type data having more than two bits. In the read operation, the apparatus reads multi-bit type data from the memory cells, converts multi-bit type data to binary type data, and outputs binary type data to outside via the other terminal not the command terminal in response to the clock signal. In the program operation, the apparatus receives binary type data from outside via the other terminal except the command terminal in response to the clock signal, converts binary type data to multi-bit type data, and writes multi-bit type data to the memory cells.