The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2004

Filed:

Jun. 19, 2003
Applicant:
Inventor:

Binan Wang, Tucson, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 ;
U.S. Cl.
CPC ...
H03F 3/45 ;
Abstract

Bias current in output transistors of a class AB output stage is controlled by providing equal amplification to both an output of an input stage ( ) of an amplifier and an output ( ) of a class AB control circuit ( ). A split input transistor circuit structure for a first side of the differential input stage ( ) includes first ( ) and second ( ) input transistors with gates coupled to a first input (Vin+). A third input transistor ( ) of the input stage has a gate coupled to a second input (Vin−). A split folded common gate cascode circuit includes first ( ) and second ( ) cascode transistors having their drains coupled to gates of the output transistors, respectively, and a third cascode transistor has a source coupled to a drain of the third input transistor. The bias current is sensed and compared with a reference current to produce an error signal that is amplified to produce a differential error current a signal which is introduced applied to sources of the first and second cascode transistors.


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