The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2004
Filed:
Oct. 03, 2003
Applicant:
Inventors:
Andrew J. Bellis, Guildford Surry, GB;
Andrew Draper, Chesham Bucks, GB;
Kulwinder Dhanoa, London Middlesex, GB;
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/9173 ;
U.S. Cl.
CPC ...
H03K 1/9173 ;
Abstract
A programmable logic device (PLD) includes a memory controller. The memory controller includes a first controller that communicates via a shared interface with a first memory external to the PLD. The memory controller also includes a second controller that communicates via the shared interface with a second memory external to the PLD. The PLD further includes an arbitration circuitry. The arbitration circuitry is configured to arbitrate ownership of the shared interface by the first and second controllers.