The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 23, 2004
Filed:
Jul. 20, 1999
William E. Guthrie, Santa Clara, CA (US);
Collett International, Inc., Santa Clara, CA (US);
Abstract
A method is provided for quantifying circuit design complexity. Conclusions regarding the time and effort to implement a circuit design are thereby derived and historical and predictive analyses prepared. Common circuit design parameters are determined using a computer-implemented Normalization Method. In the Normalization Method, the effort required to implement circuitry is quantified by evaluating each one of a set of complexity factors. The total transistor count of a circuit is then adjusted according to these complexity factors to produce a “normalized transistor” count. Design characteristics or factors that influence complexity are identified from among raw data in a database of integrated circuit design project data. These factors are then incorporated into a Normalization Equation such that normalized transistor count is a statistically significant predictor of required design project effort. An identified design characteristic is expressed mathematically as either a composition term or a figure of merit term. A scaling process is used to derive a complexity factor reflecting different levels of relative design complexity within each composition term and the relative magnitude of impact for figure of merit terms. An empirical approach or estimation is used to determine levels of complexity and magnitudes of impact. A report can also be generated to estimate the amounts of time, effort, and personnel required to accomplish a proposed circuit design project.