Method for arranging wiring line including power reinforcing line and semiconductor device having power reinforcing line

Abstract

A method for arranging a power supply line in a semiconductor device including a plurality of memory cell array blocks and a semiconductor device are provided in order to supply stable operating voltages, such as a power supply voltage and a ground voltage, to a sense amplifier allocated to each of the plurality of memory cell array blocks. The method includes the steps of arranging a plurality of first interconnections that extend in one direction and are spaced apart from one another on a semiconductor substrate on which the plurality of memory cell array blocks are formed, forming a first insulating layer on the plurality of first interconnections, arranging a plurality of power reinforcing lines that extends in one direction and are spaced apart from one another on the plurality of first interconnections on the first insulating layer, forming a second insulating layer on the plurality of power reinforcing lines, and arranging a plurality of second interconnections that intersect the plurality of first interconnections and the plurality of power reinforcing lines on the second insulating layer. The plurality of second interconnections include a first group and a second group, and the second interconnections in the second group are electrically connected to the plurality of power reinforcing lines on the plurality of memory cell array blocks via contact plugs formed in the second insulating layer.