The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2004

Filed:

Dec. 30, 2003
Applicant:
Inventor:

Jae Won Han, Gyeonggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/144 ;
Abstract

A method of fabricating a metal interconnection of semiconductor device is disclosed. A metal interconnection fabricating method according to the present invention comprises the steps of forming a metal interconnection by depositing and patterning a metal layer on a substrate with some predetermined structures; forming a passivation layer over the substrate including the metal interconnection; performing a thermal treatment process for the substrate with the passivation layer; forming a bond pad by selectively etching the passivation layer so that some portion of the metal interconnection is exposed; performing a probe test through the bond pad after grinding the back side of the substrate with the bond pad; and bonding a wire to the bond pad to connect the bond pad with an external circuit. The metal interconnection fabricating method performs a thermal treatment process prior to the formation of the bond pad opening. Therefore, the method can settle the problem that the bond pad is contaminated by materials outgassed from baking equipment or oxidized by thermal energy, thereby improving reliability of semiconductor device.


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