The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 16, 2004
Filed:
Sep. 19, 2001
An-Jui Shey, Fremont, CA (US);
Henry Horng-Fei Jyu, Sunnyvale, CA (US);
An-Chang Deng, Saratoga, CA (US);
Nassda Corporation, Santa Clara, CA (US);
Abstract
A method and system for simulating a circuit design that includes analog and/or digital circuitry uses a hybrid system of static analysis and dynamic simulation. Once the user's circuit is read in and partitioned into stages, the input vectors are applied. A hybrid vector is used to represent a number of possible signal states, for example, a logic 0 or logic 1, as well as a number of possible signal transitions, for example, a rising signal or a falling signal. The possible combinations of states are enumerated and the network in the stage is solved for all possible combinations. The results from the network solutions for the different combinations are recomposed into the hybrid notation, which is then applied to the next stage.