The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2004

Filed:

Oct. 31, 2002
Applicant:
Inventors:

Richard M. Fastow, Cupertino, CA (US);

Wing Han Leung, Sunnyvale, CA (US);

John Wang, San Jose, CA (US);

Assignee:

Advanced Micro Device, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/02 ;
U.S. Cl.
CPC ...
G11C 7/02 ;
Abstract

A reference cell transistor with a series resistance to improve reliability in reading cells in an associated memory array. The reference cell transistor is coupled in series with a resistive element such that a reference current flows therethrough to reduce a voltage between a gate and a source of the reference cell transistor. This bends the I versus V curve of the reference cell downward and compensates for irregularities in the resistance seen in series with the memory cell transistors. In this fashion, the margin when reading memory cells is improved and the reference current is more reliable. The resistive element may be external to a region having the reference cell transistor. Alternatively, the resistive element may be internal to a region with the memory array and reference cell. For example, it may be formed by extending the source region of the reference cell transistor.


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