The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2004

Filed:

Dec. 04, 2003
Applicant:
Inventors:

William Kornrumpf, Schenectady, NY (US);

Glenn Claydon, Wynantskill, NY (US);

Samhita Dasgupta, Niskayuna, NY (US);

Robert Filkins, Niskayuna, NY (US);

Glenn Forman, Niskayuna, NY (US);

Joseph Iannotti, Glenville, NY (US);

Matthew Christian Nielsen, Schenectady, NY (US);

Assignee:

General Electric Company, Schenectady, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/100 ;
U.S. Cl.
CPC ...
H01L 2/100 ;
Abstract

A method of fabricating an integrated optoelectronic circuit. The method includes positioning a microchip on a first flexible dielectric substrate. A polymer electro-optic waveguide is positioned on or within the first flexible dielectric substrate. A ground electrode is positioned along the electro-optic waveguide. A signal electrode is positioned along the electro-optic waveguide opposite the ground electrode. A first patterned metallization layer is applied to the first flexible dielectric substrate. A second flexible dielectric substrate is positioned along the first flexible dielectric substrate. A plurality of via openings are provided in the first and second flexible dielectric substrates. A second patterned metallization layer is applied to the second flexible dielectric substrate.


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