The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 2004
Filed:
May. 19, 2003
Applicant:
Inventor:
Shinji Yokogawa, Kanagawa, JP;
Assignee:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract
An interconnect of a semiconductor device having a multilayer interconnect structure is designed by predicting the life of the interconnect governed by an electromigration with different predicting models that are classified according to a void incubation period and a void growth period of a void that occurs in the vicinity of a junction between the interconnect and a via which connects upper and lower interconnect, and designing the interconnect based on the predicted life. The different predicting models are classified according to whether the interconnect with the void is positioned above or below the via.