Parallel/serial conversion circuit, light output control circuit, and optical recording apparatus

Abstract

A high speed, high accuracy parallel/serial conversion circuit, wherein a PLL circuit receives as input and locks a clock CLK, and supplies the same to different parts of an apparatus; the PLL circuit controls a 16-tap ring oscillator to shift the phase of a clock frequency-locked to a reference clock so as to generate 32 types of phase shift pulses CK to CK shifted in phase by increments of {fraction (1/32)} of the clock width from the reference clock by the differential outputs of the 16 taps and supplies the same to a P/S conversion circuit ; and the P/S conversion circuit generates fine width pulses with {fraction (1/32)} pulse widths based on the 32 types of phase shift pulses shifted in phase by increments of {fraction (1/32)}. Further, the fine width pulses are used to convert parallel signals output from a RAM and a decoder to a serial signal.