The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2004

Filed:

Aug. 01, 2002
Applicant:
Inventors:

Keiji Inoue, Yokohama, JP;

Yosuo Ohashi, Tokyo-to, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/11 ; H05K 1/14 ;
U.S. Cl.
CPC ...
H05K 1/11 ; H05K 1/14 ;
Abstract

A plurality of converter circuits is connected in parallel while reducing conduction loss. A converter circuit is formed on each of a plurality of circuit boards, and a plurality of types of terminal connection patterns containing power input terminal connection patterns and power output terminal connection patterns are formed on the end portions of each of the circuit boards with the disposition positions substantially matching each other. The terminal connection patterns at the same position of each circuit board are sandwiched by each of clips of a common terminal member, each of the circuit boards is laminated and fixed, and the converter circuits of each of the circuit boards are connected in parallel. The conduction path for electrically connecting the converter circuit of each circuit board becomes short, making it possible to reduce conduction loss. Also, it is possible to mount a plurality of converter circuits without increasing the occupied area of a motherboard to be mated therewith in comparison with a case in which the circuit boards are provided side-by-side.


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