The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2004

Filed:

Jan. 28, 1999
Applicant:
Inventor:

Satoshi Matsushita, Nagoya, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/500 ; H04M 1/100 ;
U.S. Cl.
CPC ...
G06F 1/500 ; H04M 1/100 ;
Abstract

An internet facsimile machine capable of facsimile transmission via an internet to an addressee includes an identification information input circuit for inputting user identification information of an address of an addressee, a predetermined information input/selection circuit for inputting or selecting a predetermined piece of information so that information relating to a user in the address of the addressee is narrowed, a storage unit for storing a large amount of information about the user, a candidate presenting circuit for presenting a candidate for information relating to the user in the address of the addressee by relating the predetermined information input or selected by the input/selection circuit to the information about the user stored in the storage unit, a presented candidate determining circuit for determining only one candidate when said one candidate is presented by the candidate presenting circuit, and for selecting and determining either or any one of two or more candidates when said two or more candidates are presented by the candidate presenting circuit, and a transmission instruction circuit for instructing execution of internet transmission according to an address determined by the identification information input circuit and the presented candidate determining circuit.


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