The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 02, 2004
Filed:
May. 30, 2003
Geert Adolf De Veirman, Corona del Mar, CA (US);
Mehmet Ali Tan, Irvine, CA (US);
Xinyu Chen, Irvine, CA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
A phase-locked loop (PLL) includes at least first and second loops, and loop selection circuitry coupled to the first and second loops, the loop selection circuitry being responsive to at least one loop select signal to control transition from an operating mode of one of the first and second loops to an operating mode of the other of the first and second loops. In an illustrative embodiment, the PLL comprises a dual-loop PLL with the first and second loops corresponding to respective frequency and phase loops, and the loop selection circuitry is configured such that the loop select signal as applied to a control input of a current-generating component of the first loop represents a delayed and inverted version of the loop select signal as applied to a control input of a current-generating component of the second loop.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile