The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2004

Filed:

Jun. 28, 2002
Applicant:
Inventors:

Toshinori Sueyoshi, Kumamoto, JP;

Masahiro Iida, Fujisawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/9173 ;
U.S. Cl.
CPC ...
H03K 1/9173 ;
Abstract

A programmable logic circuit device has a plurality of logic blocks, a plurality of routing wires, a plurality of switch circuits, a plurality of connection blocks, and an I/O block performing an input/output operation with external equipment. The routing wires are connected to each of the logic blocks, the switch circuits are provided at an intersection of each of the routing wires, and the connection blocks are provided between an I/O line of each of the logic blocks and each of the routing wires. Each of the logic blocks has a look up table of M inputs and N outputs, which has a plurality of LUT units; and an internal configuration control circuit controlling an internal configuration of the plurality of LUT units.


Find Patent Forward Citations

Sueyoshi, Toshinori. (2004). Programmable logic circuit device having look up table enabling to reduce implementation area (U.S. Patent No. 6812737). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6812737

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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