The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 26, 2004
Filed:
Apr. 21, 1999
Hiroyuki Kawanishi, Yokohama, JP;
Nippion Precision Circuits, Inc., Tokyo, JP;
Abstract
There is disclosed a reduced-scale digital data deinterleaver of simple structure. In a preferred embodiment each word is comprised of 32 bits of data, and 32 words form a block. In each block, each word is separated into four phases cyclically. The resulting bit lines and word lines are interchanged to produce interleaved data items. One block of the interleaved data items is written into a RAM. A higher significant address of 5 bits and a lower significant address of 5 bits of the RAM are specified by the higher significant 5 bits and the lower significant 5 bits, respectively, of the output from a counter. Whenever a block of data is written to the RAM the higher significant 5 bits and the lower significant 5 bits are interchanged to produce first and second count signals. Data is read from the specified address, 1 bit at a time and data is written, 1 bit at a time, into the address just from which data was read out. When the most and lower significant 5 bits are interchanged as described above, the higher significant 2 bits of the higher significant 5 bits and higher significant 2 bits of the lower significant 5 bits are alternately shifted toward lower significant bits.