The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 26, 2004
Filed:
Oct. 21, 2002
Hiroyuki Takahashi, Tokyo, JP;
Masatoshi Sonoda, Tokyo, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
A semiconductor memory device is provided which does not malfunction even when noise, generated inside or outside a chip, superimposes on an address. Power source noise is generated internally when a sense amplifier is activated (times t and t ) and during data output operations (time t ); in addition, system noise from outside is generated at certain times. By internally capturing an address “Address”, which is input from the outside, at the rise (time t ) of a latch control signal LC, an input sensitivity control signal IC is made valid (times t -t ) after an address skew period (times t -t ), and sensitivity with respect to the address is reduced, canceling noise on the address. Furthermore, the latch control signal LC is lowered after a data output operation (time t ). Consequently, this cancellation of the latch state prevents the generation of an incorrect address transition detect signal ATD from the address appearing the noise.