The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2004

Filed:

Jun. 26, 2003
Applicant:
Inventor:

David Pereira, Lisses, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 7/00 ;
U.S. Cl.
CPC ...
H03M 7/00 ;
Abstract

A converter circuit for converting a double width data bus (transmitting data at a single rate) to a single width data bus (transmitting data at a double rate). The circuit operates with a single clock, using the clock (positive clock) and its complement phase (negative clock) to process a set of even data and odd data. The circuit has a data mixer stage and an XOR stage. Even and odd data are mixed, using multiplexors and the positive and negative clocks, to generate mixed data. An XOR function is performed on the mixed data, using NAND gates. Using NAND gates to perform the XOR instead of a multiplexor ensures synchronous output timing, and ensures that the two stages are fully testable according to any scan-chain test method.


Find Patent Forward Citations

Loading…