The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 2004
Filed:
Jul. 09, 2002
Other;
Abstract
An initial layout of an integrated circuit device is separated into a set of definitions for use in a multiple exposure fabrication process. The separation begins with reading a portion of the initial layout and identifying one or more target features within the initial layout. Further, a first revised layout definition is created for a first mask and a second revised layout definition is created for a second mask. The first revised layout definition includes the target features inside the dark-field content. In addition, in one embodiment, the first revised layout definition includes clear areas around each target feature. The second layout definition includes one or more dark features inside the bright-field content. These dark features, when used in the multiple exposure fabrication process, will overlap the target features. The first and second masks may be binary masks, attenuated phase-shifting masks (PSMs) or a combination of a binary mask and an attenuated PSM.