The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 2004
Filed:
Oct. 11, 2002
Applicant:
Inventor:
Hiroshi Ohara, Shiojiri, JP;
Assignee:
Seiko Epson Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/3544 ; H01L 2/348 ;
U.S. Cl.
CPC ...
H01L 2/3544 ; H01L 2/348 ;
Abstract
A semiconductor wafer includes a plurality of monolithic integrated circuits formed in a semiconductor crystal for realizing a function of a plurality of semiconductor chips; a plurality of pads formed in a plurality of first regions to be the plurality of semiconductor chips; and a conductor formed in a layer lower than the pads through a second region, which is located between two of the first regions, and electrically connecting at least two of the pads.
Ohara, Hiroshi. (2004). Semiconductor wafer, method of manufacturing semiconductor wafer having bumps, semiconductor chip having bumps and method of manufacturing the same, semiconductor device, circuit board, and electronic equipment (U.S. Patent No. 6806556). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6806556
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile