The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2004
Filed:
Dec. 26, 2000
Andrew Carl Brown, Colorado Springs, CO (US);
Russell Andrew Johnson, Monument, CO (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
An intelligent host adapter for coupling a host PC to peripheral I/O devices through I/O channels wherein the host adapter has a master/slave architecture. A master I/O processor includes circuits for coupling the host adapter to a slot in an I/O interface bus of the host PC such as a PCI bus. The master I/O processor also includes circuits for a relatively small fixed number of I/O channels for connection to associated I/O peripheral busses such as SCSI, Fiber Channel and networks (i.e., Ethernet, token ring, etc.). A slave I/O processor is coupled to the master I/O processor via a dedicated master/slave interface bus. The slave I/O processor provides for addition of I/O channels to the host adapter without requiring use of additional slots of the I/O interface bus of the host PC and without using associated I/O computing resources within the host PC.