The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2004
Filed:
Mar. 31, 2000
Mark D. Lund, Vancouver, WA (US);
Thomas B. Pritchard, Brush Prairie, WA (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
Multiple algorithms are applied to expand input image data of a variety of lower resolutions to output image data of a variety of higher resolutions with enhanced text quality, particularly in the black datapath controlling an output device such as an inkjet or laser printer. Enhancement techniques include edge smoothing, bit stripping for large drop weight pens, and drop-weight based ink depletion. Embodiments provide algorithms that convert 600×600 dpi input resolution data to 1200×600 dpi output resolution image data or 300×300 to 600×300 dpi resolution (i.e., asymmetric 2:1 ratio resolution conversion along mutually perpendicular axes), including text edge smoothing, while causing minimal change to gray scaled (halftoned) data within images. The techniques can be applied to other resolutions as well. Some embodiments include unidirectional bitstripping that preserves 1200 dpi edges while applying output pixels at only 600 dpi from 1200 dpi resolution output image data. Some embodiments include drop-weight based depletion to adjust the average ink flux to 32 ng per {fraction (1/600)}th inch cell, thereby preventing excess ink application at high output resolutions, e.g., 1200×600 dpi. In various embodiments, operations are performed in hardware modules and/or performed cooperatively as an integrated process to meet system throughput requirements.