The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2004
Filed:
Nov. 07, 2002
Applicant:
Inventors:
Todd Randazzo, Colorado Springs, CO (US);
Scott Savage, Ft. Collins, CO (US);
Edson Porter, Colorado Springs, CO (US);
Matthew Russell, Burnsville, MN (US);
Kenneth Szajda, Holliston, MA (US);
Hoang Nguyen, Ft. Collins, CO (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 ;
U.S. Cl.
CPC ...
H03L 5/00 ;
Abstract
A level shifter circuit configured for use between a core of a chip and input/output transistor of the chip in order to shield low voltage devices residing on the core. The level shifter circuit includes voltage tolerant native devices which have VDDCORE on their gates, and each voltage tolerant native device is cascoded with a low voltage transistor on the core.