The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2004

Filed:

Jun. 14, 2001
Applicant:
Inventors:

Shoichiro Matsumoto, Ogaki, JP;

Naoaki Komiya, Ogaki, JP;

Masahiro Okuyama, Inazawa, JP;

Koji Hirosawa, Gifu, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 ;
U.S. Cl.
CPC ...
G09G 3/36 ;
Abstract

Between a positive power supply and a negative power supply , a p-channel transistor and an n-channel transistor are connected in series while a p-channel transistor and an n-channel transistor are also connected in series. An inverted input signal *Sig is input to the respective gates of the transistors and , while an input signal Sig is input to the respective gates of the transistors and . As a result, of a pair of the transistors connected in series, namely either the transistors and or the transistors and , when one transistor turns ON, the other transistor turns OFF. Thus, generation of through currents is prevented.


Find Patent Forward Citations

Matsumoto, Shoichiro. (2004). Level shifter for use in active matrix display apparatus (U.S. Patent No. 6801181). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6801181

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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