The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 2004
Filed:
Aug. 27, 2002
Applicant:
Inventors:
Jeffery Scott Hunt, Ackerman, MS (US);
Scott Anthony Jackson, Starkville, MS (US);
Assignee:
Cypress Semiconductor, Corp, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 1/00 ;
U.S. Cl.
CPC ...
H03B 1/00 ;
Abstract
A buffer includes a pull-up level shifter coupled to an input signal. A pull-down level shifter separate from the pull-up level shifter is coupled to the input signal. A driver is coupled to the pull-up level shifter and the pull-down level shifter.
Hunt, Jeffery. (2004). Buffer circuit using low voltage transistors and level shifters (U.S. Patent No. 6801064). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6801064
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile